While the CPUID instruction is specific to the x86 architecture, other architectures (like ARM) often provide on-chip registers which can be read in prescribed ways to obtain the same sorts of information provided by the x86 CPUID instruction. Because the 68000 offered an unprivileged MOVE from SR the 2 different CPUs could be told apart by a CPU error condition being triggered. This notable instruction (and state machine) change allowed the 68010 to meet the Popek and Goldberg virtualization requirements. In the Motorola 68010 the instruction MOVE from SR became privileged. These could be used to tell various CPU family members apart. In the Motorola 680x0 family - that never had a CPUID instruction of any kind - certain specific instructions required elevated privileges. Outside the x86 family, developers are mostly still required to use esoteric processes (involving instruction timing or CPU fault triggers) to determine the variations in CPU design that are present. With the introduction of the 80386 processor, EDX on reset indicated the revision but this was only readable after reset and there was no standard way for applications to read the value. Prior to the general availability of the CPUID instruction, programmers would write esoteric machine code which exploited minor differences in CPU behavior in order to determine the processor make and model. Ī program can use the CPUID to determine processor type and whether features such as MMX/ SSE are implemented. It was introduced by Intel in 1993 with the launch of the Pentium and SL-enhanced 486 processors. In the x86 architecture, the CPUID instruction (identified by a CPUID opcode) is a processor supplementary instruction (its name derived from CPU Identification) allowing software to discover details of the processor. Please help update this article to reflect recent events or newly available information.

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